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Schottky Barrier Silicon Nanowire SONOS Memory With Ultralow Programming and Erasing Voltages

Title: Schottky Barrier Silicon Nanowire SONOS Memory With Ultralow Programming and Erasing Voltages
Authors: Chien, ND
Contributors: 科技學院:電機工程學系; Shih, CH (Shih, Chun-Hsing); Chang, W (Chang, Wei); Luo, YX(Luo, Yan-Xiang); Liang, JT (Liang, Ji-Ting); Huang, MK(Huang, Ming-Kun); Chien, ND (Nguyen Dang Chien); Shia, RK(Shia, Ruei-Kai); Tsai, JJ (Tsai, Jr-Jie); Wu, WF (Wu, Wen-Fa); Lien, C (Lien, Chenhsin)
Publisher Information: IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Publication Year: 2011
Collection: National Chi Nan University (NCNU) Repository
Subject Terms: DSSB FINFET SONOS; FLASH MEMORY; ENHANCEMENT; CELL
Description: A new Schottky barrier (SB) nonvolatile nanowire memory is reported experimentally with efficient low-voltage programming and erasing. By applying an SB source/drain to enhance the electrical field in the silicon gate-all-around nanowire, the nonvolatile silicon-oxide-nitride-oxide-silicon (SONOS) memory can operate at gate voltages of 5 to 7 V for programming and -7 to -9 V for erasing through Fowler-Nordheim tunneling. The larger the gate voltage is, the faster the programming/erasing speed and the wider the threshold-voltage shift are attained. Importantly, the SB nanowire SONOS cells exhibit superior 100-K cycling endurance and high-temperature retention without any damages from metallic silicidation process or field-enhanced tunneling. ; SCI
Document Type: article in journal/newspaper
File Description: 106 bytes; text/html
Language: English
Relation: IEEE ELECTRON DEVICE LETTERS,32(11): 1477-1479 NOV 2015; http://ir.ncnu.edu.tw:8080/handle/310010000/12526; http://ir.ncnu.edu.tw:8080/bitstream/310010000/12526/1/index.html
Availability: http://ir.ncnu.edu.tw:8080/handle/310010000/12526; http://ir.ncnu.edu.tw:8080/bitstream/310010000/12526/1/index.html
Accession Number: edsbas.23D10649
Database: BASE