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SafeLS: An open source implementation of a lockstep NOEL-V RISC-V core

Title: SafeLS: An open source implementation of a lockstep NOEL-V RISC-V core
Authors: Sarraseca Julian, Marcel; Alcaide Portet, Sergi; Fuentes Díaz, Francisco Javier; Rodríguez Rivas, Juan Carlos; Chang, Feng; Lasfar, Ilham; Canal Corretger, Ramon; Cazorla Almeida, Francisco Javier; Abella Ferrer, Jaume
Contributors: Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors; Barcelona Supercomputing Center; Universitat Politècnica de Catalunya. CRAAX - Centre de Recerca d'Arquitectures Avançades de Xarxes
Publisher Information: Institute of Electrical and Electronics Engineers (IEEE)
Publication Year: 2023
Collection: Universitat Politècnica de Catalunya, BarcelonaTech: UPCommons - Global access to UPC knowledge
Subject Terms: Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors; Microcontrollers; Vehicles -- Safety measures; Vehicle safety; Redundancy; Regulation; Rail transportation; Open source hardware; System analysis and design; Microcontroladors; Vehicles -- Mesures de seguretat
Description: Microcontrollers running safety-critical applications with high integrity requirements must provide appropriate safety measures to manage random hardware faults. For instance, automotive safety regulations (e.g., ISO26262) impose the use of diverse redundancy for items at the highest automotive safety integrity level (ASIL), ASIL-D. In the case of computing cores, this is realized with dual core lockstep (DCLS). The advent of the RISC-VISA has made open source hardware gain popularity. However, there are few industrial open source SoCs meeting the requirements of safety-critical systems, and, to our knowledge, none of them provides lockstep cores. This paper presents the realization of a RISC-V open source lockstep core based on Gaisler's NOEL-V core for the space domain, as well as its integration in the SELENE SoC that provides a complete microcontroller synthesizable on FPGA successfully assessed against space, automotive and railway safety-critical applications in the past. ; This work is part of the European Union’s Horizon 2020 Programme under project KDT Joint Undertaking (JU) under grant agreement No 101112274 (ISOLDE). This work has also been partially supported by the Spanish Ministry of Science and Innovation under grant PID2019-107255GB-C21 funded by MCIN/AEI/10.13039/501100011033. ; Peer Reviewed ; Postprint (author's final draft)
Document Type: conference object
File Description: application/pdf
Language: English
Relation: https://ieeexplore.ieee.org/abstract/document/10224867; info:eu-repo/grantAgreement/AEI/Plan Estatal de Investigación Científica y Técnica y de Innovación 2017-2020/PID2019-107255GB-C21/ES/BSC - COMPUTACION DE ALTAS PRESTACIONES VIII/; info:eu-repo/grantAgreement/EC/HE/101112274/EU/High Performance, Safe, Secure, Open-Source Leveraged RISC-V Domain-Specific Ecosystems/ISOLDE; https://hdl.handle.net/2117/393235
DOI: 10.1109/IOLTS59296.2023.10224867
Availability: https://hdl.handle.net/2117/393235; https://doi.org/10.1109/IOLTS59296.2023.10224867
Rights: Open Access
Accession Number: edsbas.93B04FF3
Database: BASE