A 128-Gb/s D-Band Receiver With Integrated PLL and ADC Achieving 1.95-pJ/b Efficiency in 22-nm FinFET
| Title: | A 128-Gb/s D-Band Receiver With Integrated PLL and ADC Achieving 1.95-pJ/b Efficiency in 22-nm FinFET |
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| Authors: | Agrawal, A.; Whitcombe, A.; Shin, W.; Bhat, R.; Kundu, S.; Sagazio, P.; Chandrakumar, H.; Brown, T.W.; Carlton, B.R.; Hull, C.; Callender, S.; Pellerano, S. |
| Source: | IEEE Journal of Solid-State Circuits IEEE J. Solid-State Circuits Solid-State Circuits, IEEE Journal of. 58(12):3364-3379 Dec, 2023 |
| Database: | IEEE Xplore Digital Library |