| Title: |
11.4 IBM NorthPole: An Architecture for Neural Network Inference with a 12nm Chip |
| Authors: |
Cassidy, Andrew S.; Arthur, John V.; Akopyan, Filipp; Andreopoulos, Alexander; Appuswamy, Rathinakumar; Datta, Pallab; Debole, Michael V.; Esser, Steven K.; Otero, Carlos Ortega; Sawada, Jun; Taba, Brian; Amir, Arnon; Bablani, Deepika; Carlson, Peter J.; Flickner, Myron D.; Gandhasri, Rajamohan; Garreau, Guillaume J.; Ito, Megumi; Klamo, Jennifer L.; Kusnitz, Jeffrey A.; McClatchey, Nathaniel J.; McKinstry, Jeffrey L.; Nakamura, Yutaka; Nayak, Tapan K.; Risk, William P.; Schleupen, Kai; Shaw, Ben; Sivagnaname, Jay; Smith, Daniel F.; Terrizzano, Ignacio; Ueda, Takanori; Modha, Dharmendra |
| Source: |
2024 IEEE International Solid-State Circuits Conference (ISSCC) Solid-State Circuits Conference (ISSCC), 2024 IEEE International. 67:214-215 Feb, 2024 |
| Relation: |
2024 IEEE International Solid-State Circuits Conference (ISSCC) |
| Database: |
IEEE Xplore Digital Library |