Siracusa: A 16 nm Heterogenous RISC-V SoC for Extended Reality With At-MRAM Neural Engine
| Title: | Siracusa: A 16 nm Heterogenous RISC-V SoC for Extended Reality With At-MRAM Neural Engine |
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| Authors: | Prasad, A.S.; Scherer, M.; Conti, F.; Rossi, D.; Di Mauro, A.; Eggimann, M.; Gomez, J.T.; Li, Z.; Sarwar, S.S.; Wang, Z.; De Salvo, B.; Benini, L. |
| Source: | IEEE Journal of Solid-State Circuits IEEE J. Solid-State Circuits Solid-State Circuits, IEEE Journal of. 59(7):2055-2069 Jul, 2024 |
| Database: | IEEE Xplore Digital Library |