VeriPy: A Python-Powered Framework for Parsing Verilog HDL and High-Level Behavioral Analysis of Hardware
| Title: | VeriPy: A Python-Powered Framework for Parsing Verilog HDL and High-Level Behavioral Analysis of Hardware |
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| Authors: | Rashid, Md Imtiaz; Schaefer, B. Carrion |
| Source: | 2024 IEEE 17th Dallas Circuits and Systems Conference (DCAS) Circuits and Systems Conference (DCAS), 2024 IEEE 17th Dallas. :1-6 Apr, 2024 |
| Relation: | 2024 IEEE 17th Dallas Circuits and Systems Conference (DCAS) |
| Database: | IEEE Xplore Digital Library |