High Speed 64 Bit Vedic & Booth Multiplier Implementation Using FPGA
| Title: | High Speed 64 Bit Vedic & Booth Multiplier Implementation Using FPGA |
|---|---|
| Authors: | Singh, Poorvika; Bansal, Rohan; Sachdeva, Nitin; Dimri, Pradeep |
| Source: | 2024 3rd International Conference on Artificial Intelligence For Internet of Things (AIIoT) Artificial Intelligence For Internet of Things (AIIoT), 2024 3rd International Conference on. :1-6 May, 2024 |
| Relation: | 2024 3rd International Conference on Artificial Intelligence For Internet of Things (AIIoT) |
| Database: | IEEE Xplore Digital Library |