Co-Designed Silicon Photonics Chip I/O for Energy-Efficient Petascale Connectivity
| Title: | Co-Designed Silicon Photonics Chip I/O for Energy-Efficient Petascale Connectivity |
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| Authors: | Wang, Y.; Wang, S.; Parsons, R.; Sanyal, S.; Gopal, V.; Novick, A.; Rizzo, A.; Lipson, M.; Gaeta, A.L.; Bergman, K. |
| Source: | IEEE Transactions on Components, Packaging and Manufacturing Technology IEEE Trans. Compon., Packag. Manuf. Technol. Components, Packaging and Manufacturing Technology, IEEE Transactions on. 15(8):1581-1591 Aug, 2025 |
| Database: | IEEE Xplore Digital Library |