| Title: |
14.6 A 28nm 64kb Bit-Rotated Hybrid-CIM Macro with an Embedded Sign-Bit-Processing Array and a Multi-Bit-Fusion Dual-Granularity Cooperative Quantizer |
| Authors: |
Chen, Xi; Li, Shaochen; Zhang, Zhican; Zheng, Wentao; Tan, Xiao; Tang, Yuchen; Shi, Yuhui; Ren, Lizheng; Mai, Yibo; Liu, Feiran; Chen, Jinwu; Zhang, Zhaoyang; Guo, An; Xiong, Tianzhu; Wang, Bo; Liu, Xinning; Shan, Weiwei; Liu, Bo; Cai, Hao; Yang, Jun; Si, Xin |
| Source: |
2025 IEEE International Solid-State Circuits Conference (ISSCC) Solid-State Circuits Conference (ISSCC), 2025 IEEE International. 68:260-262 Feb, 2025 |
| Relation: |
2025 IEEE International Solid-State Circuits Conference (ISSCC) |
| Database: |
IEEE Xplore Digital Library |