RISC-V CPU Design Using RRAM-CMOS Standard Cells
| Title: | RISC-V CPU Design Using RRAM-CMOS Standard Cells |
|---|---|
| Authors: | Fritscher, M.; Uhlmann, M.; Ostrovskyy, P.; Reiser, D.; Chen, J.; Wen, J.; Schulze, C.; Kahmen, G.; Fey, D.; Reichenbach, M.; Krstic, M.; Wenger, C. |
| Source: | IEEE Transactions on Very Large Scale Integration (VLSI) Systems IEEE Trans. VLSI Syst. Very Large Scale Integration (VLSI) Systems, IEEE Transactions on. 33(9):2406-2414 Sep, 2025 |
| Database: | IEEE Xplore Digital Library |