| Title: |
Demonstration of Logic-Block Performance-Power-Area Gain by 1st Generation Back Side Power Delivery Network for SoC and HPC Applications Beyond 2 nm Node |
| Authors: |
Fukutome, H.; Kim, J.; Shin, J.; Lee, Y.; Chae, S.; Eom, B.; Nam, Y.S.; Lee, M.; Ha, S.; Chung, E.G.; Lee, S.H.; Kim, S.; Cho, K.H.; Lee, K.W.; Kim, D.-W.; Cho, H.-J.; Rim, K.; Song, J. |
| Source: |
2025 IEEE Custom Integrated Circuits Conference (CICC) Custom Integrated Circuits Conference (CICC), 2025 IEEE. :1-6 Apr, 2025 |
| Relation: |
2025 IEEE Custom Integrated Circuits Conference (CICC) |
| Database: |
IEEE Xplore Digital Library |