A Design Flow to Securely Isolate FPGA Bus Transactions in Heterogeneous SoCs
| Title: | A Design Flow to Securely Isolate FPGA Bus Transactions in Heterogeneous SoCs |
|---|---|
| Authors: | Salamini, Niko; Salazar, Sara Alonso; Serra, Gabriele; Cicero, Giorgiomaria; Fara, Pietro; Aromolo, Federico; Biondi, Alessandro |
| Source: | 2025 IEEE 31st Real-Time and Embedded Technology and Applications Symposium (RTAS) RTAS Real-Time and Embedded Technology and Applications Symposium (RTAS), 2025 IEEE 31st. :283-295 May, 2025 |
| Relation: | 2025 IEEE 31st Real-Time and Embedded Technology and Applications Symposium (RTAS) |
| Database: | IEEE Xplore Digital Library |