| Title: |
A CMOS-Compatible 12nm 8Mb MLC RRAM Enabling Producible 2-Bit Per Cell for High Energy Efficiency Compute-In-Memory in Edge AI Applications |
| Authors: |
Tsai, C.Y.; Liu, S.F.; Hsuen, J.H.; Lin, Brian; Hsieh, C.R.; Chan, C.W.; Chang, C.Y.; Huang, Y.C.; Yang, Julien; Wu, J.J.; Chen, Y.W.; Chang, M.F.; Chih, Y.D.; Chu, W.T.; Huang, K.C.; Chuang, Harry |
| Source: |
2025 Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) VLSI Technology and Circuits (VLSI Technology and Circuits), 2025 Symposium on. :1-3 Jun, 2025 |
| Relation: |
2025 Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) |
| Database: |
IEEE Xplore Digital Library |