Microarchitecture Design and Benchmarking of Custom SHA-3 Instruction for RISC-V
| Title: | Microarchitecture Design and Benchmarking of Custom SHA-3 Instruction for RISC-V |
|---|---|
| Authors: | Bolat, Alperen; Sezer, Sakir; McLaughlin, Kieran; Hui, Henry |
| Source: | 2025 IEEE Computer Society Annual Symposium on VLSI (ISVLSI) VLSI (ISVLSI), 2025 IEEE Computer Society Annual Symposium on. 1:1-6 Jul, 2025 |
| Relation: | 2025 IEEE Computer Society Annual Symposium on VLSI (ISVLSI) |
| Database: | IEEE Xplore Digital Library |