| Title: |
Memory Dynamic Faults and Array-Level Faults Detector in Digital Test Environment |
| Authors: |
Ronga, D.; Faehn, E.; Girard, P.; Virazel, A. |
| Source: |
2025 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), 2025 IEEE International Symposium on. :1-6 Oct, 2025 |
| Relation: |
2025 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) |
| Database: |
IEEE Xplore Digital Library |