A Novel Hybrid Circuit Breaker Architecture With Built-in Current Limiting Capability – I: Semiconductor Design
| Title: | A Novel Hybrid Circuit Breaker Architecture With Built-in Current Limiting Capability – I: Semiconductor Design |
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| Authors: | Patel, V.; Chavan, G.; Abplanalp, M.; Song, X.; Cairoli, P. |
| Source: | IEEE Transactions on Power Electronics IEEE Trans. Power Electron. Power Electronics, IEEE Transactions on. 41(6):10243-10254 Jun, 2026 |
| Database: | IEEE Xplore Digital Library |