Low Power MRL-based Digital Magnitude Squarer Circuit design
| Title: | Low Power MRL-based Digital Magnitude Squarer Circuit design |
|---|---|
| Authors: | Kasim, Abu; Mandal, Gouranga; Kumar, Ayush; Ghosh, Mourina; Mondal, Pulak |
| Source: | 2025 IEEE Silchar Subsection Conference (SILCON) Silchar Subsection Conference (SILCON), 2025 IEEE. :1-5 Nov, 2025 |
| Relation: | 2025 IEEE Silchar Subsection Conference (SILCON) |
| Database: | IEEE Xplore Digital Library |