| Title: |
A 56-Gb/s Hybrid Silicon Photonic and 5-nm CMOS 3-D-Integrated Transceiver for Optical Compute I/O |
| Authors: |
Balamurugan, G.; Mishra, P.; Sahni, S.; Aggarwal, A.; Forey, S.; Gimlett, A.; Goyal, P.; Hao, H.; Hariwan, S.; Hossain, M.; Jeon, S.; Kaniyur, N.; Lazovsky, D.; Lee, W.; Littmann, B.; Nagulapalli, R.; Park, K.; Rollinson, J.; Staffaroni, M.; Thakur, P.; Vats, S.; Virk, P.; Xiao, D.; Yasotharan, H.; Yazdani, R.; Younis, W.; Yu, S.; Winterbottom, P. |
| Source: |
IEEE Journal of Solid-State Circuits IEEE J. Solid-State Circuits Solid-State Circuits, IEEE Journal of. 61(4):1342-1352 Apr, 2026 |
| Database: |
IEEE Xplore Digital Library |