| Title: |
Sequential Dual-Loop Digital and Analog PLL Synthesizer for Fast-Locking IoT Applications in 18nm FD-SOI CMOS |
| Authors: |
Colrat, Virgile; Gaidioz, David; Asprilla, Andres; Paillardet, Frederic; Cathelin, Andreia; Deval, Yann |
| Source: |
2026 IEEE 17th Latin America Symposium on Circuits and System (LASCAS) Circuits and System (LASCAS), 2026 IEEE 17th Latin America Symposium on. :1-4 Feb, 2026 |
| Relation: |
2026 IEEE 17th Latin America Symposium on Circuits and System (LASCAS) |
| Database: |
IEEE Xplore Digital Library |