| Title: |
A 28nm 11.2-to-20-GHz PLL-based 16-Phase Clock Generator with High-Order-Mode Ring Oscillator Achieving 24.3-fs Jitter for 320-Gsps-Sample-Rate Data Converter |
| Authors: |
Ye, Zonglin; Hou, Longxiang; Sun, Yuxuan; Ding, Yuhan; Wen, Yixuan; Zhang, Hongyang; Luo, Hao; Yang, Yi; Zhang, Chenming; Geng, Xinlin; Xie, Qian; Wang, Cheng; Zhou, Jun; Wang, Zheng |
| Source: |
2026 IEEE Custom Integrated Circuits Conference (CICC) Custom Integrated Circuits Conference (CICC), 2026 IEEE. :1-4 Apr, 2026 |
| Relation: |
2026 IEEE Custom Integrated Circuits Conference (CICC) |
| Database: |
IEEE Xplore Digital Library |