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Design and Implementation of a Low-Latency Pipelined Architecture for VLSI Accelerators

Title: Design and Implementation of a Low-Latency Pipelined Architecture for VLSI Accelerators
Authors: D, Jeffrina Mary; R, Aldiyanaa J; J, Sherin; Thomas, Raichel; G, Manoj; A, Janet Jackcy
Source: 2026 4th International Conference on Artificial Intelligence and Machine Learning Applications Theme: Healthcare and Internet of Things (AIMLA) Artificial Intelligence and Machine Learning Applications Theme: Healthcare and Internet of Things (AIMLA), 2026 4th International Conference on. :1-5 Apr, 2026
Relation: 2026 4th International Conference on Artificial Intelligence and Machine Learning Applications Theme: Healthcare and Internet of Things (AIMLA)
Database: IEEE Xplore Digital Library