Design and implementation of an embedded 512KB level 2 cache subsystem
| Title: | Design and implementation of an embedded 512KB level 2 cache subsystem |
|---|---|
| Authors: | Jinuk Luke Shin; Petrick, B.; Levy, H.; Jinseung Son; Mandeep Singh; Mathur, V.; Jung-Cheng Yeh; Heesung Choi; Gupta, V.; Ziaja, T.; Leon, A.S. |
| Source: | Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571) Custom integrated circuists Custom Integrated Circuits Conference, 2004. Proceedings of the IEEE 2004. :349-352 2004 |
| Relation: | Proceedings of the IEEE 2004 Custom Integrated Circuits Conference |
| Database: | IEEE Xplore Digital Library |