A highly integrated 40-MIPS (peak) 64-b RISC microprocessor
| Title: | A highly integrated 40-MIPS (peak) 64-b RISC microprocessor |
|---|---|
| Authors: | Miyake, J.; Maeda, T.; Nishimichi, Y.; Katsura, J.; Taniguchi, T.; Yamaguchi, S.; Edamatsu, H.; Watari, S.; Takagi, Y.; Tsuji, K.; Kuninobu, S.; Cox, S.; Duschatko, D.; MacGregor, D. |
| Source: | IEEE Journal of Solid-State Circuits IEEE J. Solid-State Circuits Solid-State Circuits, IEEE Journal of. 25(5):1199-1206 Oct, 1990 |
| Database: | IEEE Xplore Digital Library |