| Title: |
A 33 GB/s 13.4 Mb integrated graphics accelerator and frame buffer |
| Authors: |
Torrance, R.; Mes, I.; Hold, B.; Jones, D.; Crepeau, J.; DeMone, P.; MacDonald, D.; O'Connell, C.; Gillingham, P.; White, R.; Duggins, S.; Fielder, D. |
| Source: |
1998 IEEE International Solid-State Circuits Conference. Digest of Technical Papers, ISSCC. First Edition (Cat. No.98CH36156) Solid-state circuits Solid-State Circuits Conference, 1998. Digest of Technical Papers. 1998 IEEE International. :340-341 1998 |
| Relation: |
1998 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC |
| Database: |
IEEE Xplore Digital Library |