| Title: |
Cross-layer floorplan optimization for silicon photonic NoCs in many-core systems |
| Authors: |
Coskun, Ayse K.; Gu, Anjun; Jin, Warren; Joshi, Ajay; Kahng, Andrew B.; Klamkin, Jonathan; Ma, Yenai; Recchio, John; Srinivas, Vaishnav; Zhang, Tiansheng |
| Source: |
2016 Design, Automation & Test in Europe Conference & Exhibition (DATE) Design, Automation & Test in Europe Conference & Exhibition (DATE), 2016. :1309-1314 Mar, 2016 |
| Relation: |
2016 Design, Automation & Test in Europe Conference & Exhibition (DATE) |
| Database: |
IEEE Xplore Digital Library |