| Title: |
DTCO and TCAD for a 12 Layer-EUV Ultra-Scaled Surrounding Gate Transistor 6T-SRAM |
| Authors: |
Matagne, P.; Nakamura, H.; Kim, M.-S.; Kikuchi, Y.; Huynh-Bao, T.; Tao, Z.; Li, W.; Devriendt, K.; Ragnarsson, L.-A.; Boemmels, J.; Mallik, A.; Altamirano-Sachez, E.; Sebaai, F.; Lorant, C.; Jourdan, N.; Porret, C.; Mocuta, D.; Harada, N.; Masuoka, F. |
| Source: |
2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) Simulation of Semiconductor Processes and Devices (SISPAD), 2018 International Conference on. :45-48 Sep, 2018 |
| Relation: |
2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) |
| Database: |
IEEE Xplore Digital Library |