| Title: |
Buried metal line compatible with 3D sequential integration for top tier planar devices dynamic Vth tuning and RF shielding applications |
| Authors: |
Vandooren, A.; Wu, Z.; Khaled, A.; Franco, J.; Parvais, B.; Li, W.; Witters, L.; Walke, A.; Peng, L.; Rassoul, N.; Matagne, P.; Debruyn, H.; Jamieson, G.; Inoue, F.; Devriendt, K.; Teugels, L.; Heylen, N.; Vecchio, E.; Zheng, T.; Radisic, D.; Rosseel, E.; Vanherle, W.; Hikavyy, A.; Chan, B. T.; Besnard, G.; Schwarzenbach, W.; Gaudin, G.; Radu, I.; Nguyen, B.-Y.; Waldron, N.; De Heyn, V.; Demuynck, S.; Boemmels, J.; Ryckaert, J.; Collaert, N.; Mocuta, D. |
| Source: |
2019 Symposium on VLSI Technology VLSI Technology, 2019 Symposium on. :T56-T57 Jun, 2019 |
| Relation: |
2019 Symposium on VLSI Technology |
| Database: |
IEEE Xplore Digital Library |