Inter-Lock: Logic Encryption for Processor Cores Beyond Module Boundaries
| Title: | Inter-Lock: Logic Encryption for Processor Cores Beyond Module Boundaries |
|---|---|
| Authors: | Sisejkovic, D.; Merchant, F.; Leupers, R.; Ascheid, G.; Kegreiss, S. |
| Source: | 2019 IEEE European Test Symposium (ETS) Test Symposium (ETS), 2019 IEEE European. :1-6 May, 2019 |
| Relation: | 2019 IEEE European Test Symposium (ETS) |
| Database: | IEEE Xplore Digital Library |