| Title: |
2.3 A 220GOPS 96-Core Processor with 6 Chiplets 3D-Stacked on an Active Interposer Offering 0.6ns/mm Latency, 3Tb/s/mm2 Inter-Chiplet Interconnects and 156mW/mm2@ 82%-Peak-Efficiency DC-DC Converters |
| Authors: |
Vivet, Pascal; Guthmuller, Eric; Thonnart, Yvain; Pillonnet, Gael; Moritz, Guillaume; Miro-Panades, Ivan; Fuguet, Cesar; Durupt, Jean; Bernard, Christian; Varreau, Didier; Pontes, Julian; Thuries, Sebastien; Coriat, David; Harrand, Michel; Dutoit, Denis; Lattard, Didier; Arnaud, Lucile; Charbonnier, Jean; Coudrain, Perceval; Garnier, Arnaud; Berger, Frederic; Gueugnot, Alain; Greiner, Alain; Meunier, Quentin; Farcy, Alexis; Arriordaz, Alexandre; Cheramy, Severine; Clermidy, Fabien |
| Source: |
2020 IEEE International Solid-State Circuits Conference - (ISSCC) Solid-State Circuits Conference - (ISSCC), 2020 IEEE International. :46-48 Feb, 2020 |
| Relation: |
2020 IEEE International Solid-State Circuits Conference - (ISSCC) |
| Database: |
IEEE Xplore Digital Library |