| Title: |
7.1 A 3.4-to-13.3TOPS/W 3.6TOPS Dual-Core Deep-Learning Accelerator for Versatile AI Applications in 7nm 5G Smartphone SoC |
| Authors: |
Lin, Chien-Hung; Cheng, Chih-Chung; Tsai, Yi-Min; Hung, Sheng-Je; Kuo, Yu-Ting; Wang, Perry H; Tsung, Pei-Kuei; Hsu, Jeng-Yun; Lai, Wei-Chih; Liu, Chia-Hung; Wang, Shao-Yu; Kuo, Chin-Hua; Chang, Chih-Yu; Lee, Ming-Hsien; Lin, Tsung-Yao; Chen, Chih-Cheng |
| Source: |
2020 IEEE International Solid-State Circuits Conference - (ISSCC) Solid-State Circuits Conference - (ISSCC), 2020 IEEE International. :134-136 Feb, 2020 |
| Relation: |
2020 IEEE International Solid-State Circuits Conference - (ISSCC) |
| Database: |
IEEE Xplore Digital Library |