Multi-pillar SOT-MRAM for Accurate Analog in-Memory DNN Inference
| Title: | Multi-pillar SOT-MRAM for Accurate Analog in-Memory DNN Inference |
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| Authors: | Doevenspeck, J.; Garello, K.; Rao, S.; Yasin, F.; Couet, S.; Jayakumar, G.; Mallik, A.; Cosemans, S.; Debacker, P.; Verkest, D.; Lauwereins, R.; Dehaene, W.; Kar, G.S. |
| Source: | 2021 Symposium on VLSI Technology VLSI Technology, 2021 Symposium on. :1-2 Jun, 2021 |
| Relation: | 2021 Symposium on VLSI Technology |
| Database: | IEEE Xplore Digital Library |